Module Specification |
| The information contained in this module specification was correct at the time of publication but may be subject to change, either during the session because of unforeseen circumstances, or following review of the module at the end of the session. Queries about the module should be directed to the member of staff with responsibility for the module. |
| Title | DIGITAL ELECTRONICS & MICROPROCESSOR SYSTEMS | ||
| Code | ELEC211 | ||
| Coordinator |
Dr V Selis Electrical Engineering and Electronics V.Selis@liverpool.ac.uk |
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| Year | CATS Level | Semester | CATS Value |
| Session 2020-21 | Level 5 FHEQ | Second Semester | 15 |
Aims |
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To provide students with the ability to: Design digital systems using the Algorithmic State Machine (ASM) methodology. Understand the features of Programmable Logic Devices (PLDs) and use them in their designs. Interface memory and other peripherals to microprocessor systems. Provide knowledge of microprocessor systems with a good understanding of how basic microprocessors work. Understand basic assembly language programmes. Know the different data formats such as ASCII 2's complement and floating point format and more advanced microprocessor concepts such as pipelines and Harvard architecture. |
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Pre-requisites before taking this module (other modules and/or general educational/academic requirements): |
Co-requisite modules: |
Learning Outcomes |
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(LO1) Demonstrate a knowledge of digital electronics including combinational and sequential logic, algorithmic state machine (ASM) design techniques, Quine-McCluskey method and Karnuagh map-entered variables. |
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(LO2) Demonstrate an ability to design digital electronics using FPGA and a hardware description language. |
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(LO3) Demonstrate a knowledge of microprocessor concepts including architecture, assembly language, standard formats for negative and floating point numbers |
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(LO4) Demonstrate a knowledge of more advanced microprocessor concepts including von Neuman/ Harvard architectures, pipelining and memory cache. |
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(LO5) Demonstrate an ability to understand assembly language code and use assembly language to write simple computer programmes on a basic microprocessor. |
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(S1) Information technology (application of) adopting, adapting and using digital devices, applications and services |
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(S2) Numeracy (application of) manipulation of numbers, general mathematical awareness and its application in practical contexts (e.g. measuring, weighing, estimating and applying formulae) |
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(S3) Problem solving/ critical thinking/ creativity analysing facts and situations and applying creative thinking to develop appropriate solutions. |
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Syllabus |
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DIGITAL ELECTRONICS: MICROPROCESSOR SYSTEMS: Revision of binary, hexadecimal and ASCII. Basic Microprocessor Organisation: CPU, ALU and memory. Data address and control buses. Fetch, decode, execute. Registers Basic instructions - moving data, mathematical and logical operations. Assembly language programming: Mnemonics. Addressing modes. Program counter and branches. Conditional instructions and flags. Negative number representations. Use of the carry, overflow and zero flags. Floating point numbers (IEEE 794). Branch and link - link register. Stacks and stack pointer. Interrupts. Advanced microprocessor architecture: Instruction pipelines. Von Neuman/Harvard architectures. Memory cache. Memory addressing. Memory mapped input and output. ARM processor modes. Exception handling. |
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Teaching and Learning Strategies |
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Due to Covid-19, one or more of the following delivery methods will be implemented based on the current local conditions and the situation of registered students. Teaching Method 2 - Synchronous face to face tutorials Teaching Method 3 - Laboratory Work (b) Fully online delivery and assessment Teaching Method 2 - On-line synchronous tutorials Teaching Method 3 - on-line Laboratory Work Tutorials (c) Standard on-campus delivery with minimal social distancing Teaching Method 2 - Tutorial Teaching Method 3 - Laboratory Work |
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Teaching Schedule |
| Lectures | Seminars | Tutorials | Lab Practicals | Fieldwork Placement | Other | TOTAL | |
| Study Hours |
32 |
14 |
15 |
61 | |||
| Timetable (if known) | |||||||
| Private Study | 89 | ||||||
| TOTAL HOURS | 150 | ||||||
Assessment |
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| EXAM | Duration | Timing (Semester) |
% of final mark |
Resit/resubmission opportunity |
Penalty for late submission |
Notes |
| Formal written examination There is a resit opportunity. This is an anonymous assessment. Assessment Schedule (When) :Semester 2 examination period | 3 hours | 75 | ||||
| CONTINUOUS | Duration | Timing (Semester) |
% of final mark |
Resit/resubmission opportunity |
Penalty for late submission |
Notes |
| Experiment 28 Altera FPGA Assessment Schedule (When) :As scheduled | 16 hours | 10 | ||||
| Experiment 26 ARM microprocessor Standard UoL penalty applies for late submission. This is an anonymous assessment. Assessment Schedule (When) :As scheduled | 8 hours | 5 | ||||
| 3 tests delivered on VITAL There is a resit opportunity. Standard UoL penalty applies for late submission. This is an anonymous assessment. Assessment Schedule (When) :Semester 1 | One VITAL test per f | 10 | ||||
Reading List |
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| Reading lists are managed at readinglists.liverpool.ac.uk. Click here to access the reading lists for this module. | |