Module Details

The information contained in this module specification was correct at the time of publication but may be subject to change, either during the session because of unforeseen circumstances, or following review of the module at the end of the session. Queries about the module should be directed to the member of staff with responsibility for the module.
Title Thesis: Research by Design
Code ARCH722
Coordinator Mr A Agkathidis
Architecture
Asterios.Agkathidis@liverpool.ac.uk
Year CATS Level Semester CATS Value
Session 2019-20 Level 7 FHEQ Summer (June-September) 60

Aims

To carry out a specific piece of research on a self selected topic and to develop a designed object that is derived directly from it.

To develop and practice academic skills in identifying a current design problem, formulating an analysis strategy, managing the design process and drawing relevant conclusions from the design project and response to any research findings.

To develop the idea of an design in the widest sense as a vehicle to apply research study and information drawn from appropriate literature.

To develop a deeper understanding in depth of a relevant body of design precedent and literature.


Learning Outcomes

(LO1) The module is intended to allow students:

To identify an appropriate research topic that can be investigated and reported on through sources of information that be in the form of written and/or design output.

(LO2) To design an effective project using appropriate methods (e.g. literature review, case study) and techniques that is derived directly from and satisfies the researched topic.

(LO3) To manage the research process effectively within given resources and meeting milestones on time.

(LO4) To gain a deeper understanding of a particular topic in a chosen subject area.

(LO5) To form independent and objective views on issues in a specialised subject area.

(LO6) To produce a well-written, clearly presented consistently referenced and properly formatted Research Report and a well-conceived, appropriate, well-supported and well-executed design project that is derived from the research.

(S1) Improving own learning/performance - Reflective practice.

(S2) Improving own learning/performance - Self-awareness/self-analysis.

(S3) Improving own learning/performance - Personal action planning.

(S4) Communication (oral, written and visual) - Presentation skills – oral.

(S5) Communication (oral, written and visual) - Presentation skills - written.

(S6) Communication (oral, written and visual) - Presentation skills - visual.


Syllabus

 

The theme of the module will change from year to year in the light of current themes and issues in the profession and with the specific degree programme.


Teaching and Learning Strategies

Teaching Method 1 - Tutorial
Description:
Attendance Recorded: Not yet decided
Notes: The module is taught through studio based tutorials by both full time and part time staff

Teaching Method 2 - Assessment
Description:
Attendance Recorded: Not yet decided
Notes: Digital portfolio review plus work display including a 5000 word design or research report (90%) and additional material (sketches, models, drawings, etc.) Use and development of process through a wiki on VITAL (10%) Assessed by studio tutorial staff involved, moderated by other school staff and external examiner


Teaching Schedule

  Lectures Seminars Tutorials Lab Practicals Fieldwork Placement Other TOTAL
Study Hours     95

    1

96
Timetable (if known)              
Private Study 504
TOTAL HOURS 600

Assessment

EXAM Duration Timing
(Semester)
% of
final
mark
Resit/resubmission
opportunity
Penalty for late
submission
Notes
             
CONTINUOUS Duration Timing
(Semester)
% of
final
mark
Resit/resubmission
opportunity
Penalty for late
submission
Notes
Assessment 1 There is a resit opportunity. Standard UoL penalty applies for late submission. Assessment Schedule (When) :summer  digital design portf    100       

Recommended Texts

Reading lists are managed at readinglists.liverpool.ac.uk. Click here to access the reading lists for this module.